Johnnie Chan

According to our database1, Johnnie Chan authored at least 13 papers between 2009 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Photonic Network-on-Chip Design.
Integrated Circuits and Systems, Springer, ISBN: 978-1-4419-9334-2, 2014

2013
Scaling Star-Coupler-Based Optical Networks for Avionics Applications.
JOCN, 2013

P-sync: A Photonically Enabled Architecture for Efficient Non-local Data Access.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

2012
Photonic Interconnection Network Architectures Using Wavelength-Selective Spatial Routing for Chip-Scale Communications.
JOCN, 2012

2011
Physical-Layer Modeling and System-Level Design of Chip-Scale Photonic Interconnection Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Time-division-multiplexed arbitration in silicon nanophotonic networks-on-chip for high-performance chip multiprocessors.
J. Parallel Distributed Comput., 2011

Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors.
ACM J. Emerg. Technol. Comput. Syst., 2011

VANDAL: A tool for the design specification of nanophotonic networks.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing.
Proceedings of the Conference on High Performance Computing Networking, 2010

Tools and methodologies for designing energy-efficient photonic networks-on-chip for highperformance chip multiprocessors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Silicon Nanophotonic Network-on-Chip Using TDM Arbitration.
Proceedings of the IEEE 18th Annual Symposium on High Performance Interconnects, 2010

PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Analysis of photonic networks for a chip multiprocessor using scientific applications.
Proceedings of the Third International Symposium on Networks-on-Chips, 2009


  Loading...