John W. M. Rogers
Orcid: 0000-0002-5075-4252
According to our database1,
John W. M. Rogers
authored at least 29 papers
between 2000 and 2023.
Collaborative distances:
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Bibliography
2023
A 56 GHz InP VCO for Use in 112 GBaud (112 GBit/s NRZ or 224 GBit/s PAM-4) InP Integrated Optical Receiver Front-End CDR Block.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2023
2022
A 6 GHz Digitally-Controlled Oscillator Achieving Minimum Fine Tuning Step Size of Up to 160 Hz Using Capacitive Degeneration Technique in 40 nm CMOS Process.
Proceedings of the International Conference on Microelectronics, 2022
Using TFM Analysis and Memory Map Calibration for Designing Linear and Monotonic LC DCOs.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022
A 5.56 GHz Single Core Digitally-Controlled Oscillator With Direct Fine Tuning Steps of 2.85 kHz.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
2019
Analysis and Correction of Noise Injection Due to Parallel-Output-Misalignment (POM) Effects in Ring-Type Time-to-Digital Converters (TDCs).
IEEE J. Solid State Circuits, 2019
2017
A Highly Compact 2.4-GHz Passive 6-bit Phase Shifter With Ambidextrous Quadrant Selector.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
2015
Optimization of EVM Through Diode Bias Control Using a Blind Algorithm Applied to Multiport Receivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
A 0.009-1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
2014
Guest Editorial - Special Section on the 2013 IEEE Custom Integrated Circuits Conference (CICC 2013).
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
2013
Guest Editorial: Special Section on the 2012 IEEE Custom Integrated Circuits Conference (CICC 2012).
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
2012
Highly reconfigurable single-ended low noise amplifier for software defined radio applications.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
2008
IEEE J. Solid State Circuits, 2008
2006
Design and Characterization of a 5.2 GHz/2.4 GHz ΣΔ Fractional-N Frequency Synthesizer for Low-Phase Noise Performance.
EURASIP J. Wirel. Commun. Netw., 2006
5.2 GHz self-powered lock and roll radio using VCO injection-locking and on-chip antennas.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Silicon Differential Antenna/Inductor for Short Range Wireless Communication Applications.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
2005
IEEE J. Solid State Circuits, 2005
IEEE J. Solid State Circuits, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
A 5 GHz direct-conversion receiver with DC offset correction.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
A study of digital and analog automatic-amplitude control circuitry for voltage-controlled oscillators.
IEEE J. Solid State Circuits, 2003
A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications.
Proceedings of the ESSCIRC 2003, 2003
2001
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001
2000
The effect of varactor nonlinearity on the phase noise of completely integrated VCOs.
IEEE J. Solid State Circuits, 2000