John V. Vourvoulakis

According to our database, John V. Vourvoulakis authored at least 12 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An Efficient Implementation for the Stratix V and Zynq UltraScale+ FPGA Technology.

John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis

ACM Trans. Reconfigurable Technol. Syst., March, 2024

2023

A Testbench for Stereo-Processing Acceleration Based on PYNQ and the StereoPi.

John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis

Proceedings of the 12th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2023

2022

Acceleration of image processing algorithms based on a Single Board Computer and FPGA co-design.

Petros Kokotis, John V. Vourvoulakis

Proceedings of the 11th International Conference on Modern Circuits and Systems Technologies, 2022

2021

Real-time pulse oximetry extraction using a lightweight algorithm and a task pipeline scheme.

John V. Vourvoulakis, Leonardos Bilalis

Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

A Workflow for Designing Video Processing Pipelines with PYNQ.

John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis

Proceedings of the 2021 11th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), 2021

The Robin Soft-Core: A Paradigm for Studying VHDL and Computer Architecture.

John A. Kalomiros, John V. Vourvoulakis

Proceedings of the 2021 11th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), 2021

2018

FPGA-based architecture of a real-time SIFT matcher and RANSAC algorithm for robotic vision applications.

John V. Vourvoulakis, John A. Kalomiros, John N. Lygouras

Multim. Tools Appl., 2018

2017

FPGA accelerator for real-time SIFT matching with RANSAC support.

John V. Vourvoulakis, John A. Kalomiros, John N. Lygouras

Microprocess. Microsystems, 2017

A complete processor for SIFT feature matching in video sequences.

John V. Vourvoulakis, John A. Kalomiros, John N. Lygouras

Proceedings of the 9th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2017

2016

Fully pipelined FPGA-based architecture for real-time SIFT extraction.

John V. Vourvoulakis, John A. Kalomiros, John N. Lygouras

Microprocess. Microsystems, 2016

2015

Design details of a low Cost and High Performance robotic Vision Architecture.

John V. Vourvoulakis, John A. Kalomiros, John N. Lygouras

Int. J. Comput., 2015

2012

Acceleration of Image Processing Algorithms Using Minimal Resources of Custom Reconfigurable Hardware.

John V. Vourvoulakis, John N. Lygouras, John A. Kalomiros

Proceedings of the 16th Panhellenic Conference on Informatics, PCI 2012, 2012