John V. Hatfield

According to our database, John V. Hatfield authored at least 5 papers between 1989 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2000

A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line.

Piotr Dudek, Stanislaw Szczepanski, John V. Hatfield

IEEE J. Solid State Circuits, 2000

1997

Development of an Analogue Microprocessor.

D. L. Grundy, M. Bozic, John V. Hatfield

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

1994

A programmable multi-channel CMOS pulser chip to drive ultrasonic array transducers.

N. R. Scales, Peter J. Hicks, A. D. Armitage, P. A. Payne, Q. X. Chen, John V. Hatfield

IEEE J. Solid State Circuits, August, 1994

An Analogue Current-Mode Signal Processing ASIC for Interrogating Resistive Sensor Arrays.

Philip I. Neaves, John V. Hatfield

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1989

Development of a new type of self-scanned electron image sensing integrated circuit.

John V. Hatfield, Trevor A. York, John Comer, Peter J. Hicks

IEEE J. Solid State Circuits, June, 1989