John Paul Mattia

According to our database, John Paul Mattia authored at least 4 papers between 1996 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2003

A 40-43-Gb/s clock and data recovery IC with integrated SFI-5 1: 16 demultiplexer in SiGe technology.

Adrian Ong, Saied Benyamin, Jason Cancio, Vincent Condito, Tad Labrie, Qinghung Lee, John Paul Mattia, Derek K. Shaeffer, Arvin Shahani, Xiaomin Si, Hai Tao, Maurice Tarsia, Wayne Wong, Min Xu

IEEE J. Solid State Circuits, 2003

2002

Clock and data recovery IC for 40-Gb/s fiber-optic receiver.

George Georgiou, Yves Baeyens, Young-Kai Chen, Alan H. Gnauck, Carsten Gröpper, Peter Paschke, Rajasekhar Pullela, Mario Reinhold, Claus Dorschky, John Paul Mattia, Timo Winkler von Mohrenfels, Christoph Schulien

IEEE J. Solid State Circuits, 2002

2001

A fully integrated 40-Gb/s clock and data recovery IC with 1: 4 DEMUX in SiGe technology.

Mario Reinhold, Claus Dorschky, Eduard Rose, Rajasekhar Pullela, Peter Mayer, Frank Kunz, Yves Baeyens, Thomas Link, John Paul Mattia

IEEE J. Solid State Circuits, 2001

1996

AC behavior of resonant-tunneling diodes in the scattering-dominated regime.

John Paul Mattia

PhD thesis, 1996