John Niroula

According to our database, John Niroula authored at least 8 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Record High Temperature Performance in Scaled AlGaN/GaN-on-Si HEMTs up to 500°C.

John Niroula, Matthew A. Taylor, Qingyun Xie, Pradyot Yadav, Shisong Luo, Yuji Zhao, Tomás Palacios

Proceedings of the Device Research Conference, 2024

2023

Towards DTCO in High Temperature GaN-on-Si Technology: Arithmetic Logic Unit at 300 °C and CAD Framework up to 500 °C.

Qingyun Xie, Mengyang Yuan, John Niroula, Bejoy Sikder, Shisong Luo, Kai Fu, Nitul S. Rajput, Ayan Biswas Pranta, Pradyot Yadav, Yuji Zhao, Nadim Chowdhury, Tomás Palacios

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

First Demonstration of GaN RF HEMTs on Engineered Substrate.

Pradyot Yadav, Qingyun Xie, John Niroula, Gillian K. Micale, Hridibrata Pal, Tomás Palacios

Proceedings of the Device Research Conference, 2023

2020

First Demonstration of GaN Vertical Power FinFETs on Engineered Substrate.

Ahmad Zubair, Joshua A. Perozek, John Niroula, O. Aktas, V. Odnoblyudov, Tomás Palacios

Proceedings of the 2020 Device Research Conference, 2020

Materials and Technology Issues for the Next Generation of Power Electronic Devices.

Ahmad Zubair, John Niroula, Nadim Chowdhury, Yuhao Zhang, Jori Lemettinen, Tomás Palacios

Proceedings of the 2020 Device Research Conference, 2020

2019

Using Floating Gate Memory to Train Ideal Accuracy Neural Networks.

Sapan Agarwal, Diana Garland, John Niroula, Robin B. Jacobs-Gedrim, Alexander H. Hsia, Michael S. van Heukelom, Elliot J. Fuller, Bruce Draper, Matthew J. Marinella

CoRR, 2019

2018

Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator.

Matthew J. Marinella, Sapan Agarwal, Alexander H. Hsia, Isaac Richter, Robin Jacobs-Gedrim, John Niroula, Steven J. Plimpton, Engin Ipek, Conrad D. James

IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

2017

Impact of Linearity and Write Noise of Analog Resistive Memory Devices in a Neural Algorithm Accelerator.

Robin B. Jacobs-Gedrim, Sapan Agarwal, Kathrine E. Knisely, Jim E. Stevens, Michael S. van Heukelom, David R. Hughart, John Niroula, Conrad D. James, Matthew J. Marinella

Proceedings of the IEEE International Conference on Rebooting Computing, 2017