John Goodacre

Orcid: 0000-0002-7920-8028

According to our database1, John Goodacre authored at least 44 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Single Event Effects Assessment of UltraScale+ MPSoC Systems Under Atmospheric Radiation.
IEEE Trans. Reliab., March, 2024

Understanding the Impact of Arbitration in MZI-Based Beneš Switching Fabrics.
IEEE Trans. Parallel Distributed Syst., February, 2024

Quff: A Dynamically Typed Hybrid Quantum-Classical Programming Language.
Proceedings of the 21st ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes, 2024

AccProf: Increasing the Accuracy of Embedded Application Profiling Using FPGAs.
Proceedings of the Architecture of Computing Systems - 37th International Conference, 2024

2023
DiAD - Distributed Acceleration for Datacenter FPGAs.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

2022
Discovering Associations Between Acoustic Emission and Magnetic Resonance Imaging Biomarkers From 10 Osteoarthritic Knees.
IEEE Trans. Biomed. Eng., 2022

2021
On the routing and scalability of MZI-based optical Beneš interconnects.
Nano Commun. Networks, 2021

The Birth of Arm Multicore Processing.
IEEE Micro, 2021

Power and energy efficient routing for Mach-Zehnder interferometer based photonic switches.
Proceedings of the ICS '21: 2021 International Conference on Supercomputing, 2021

Energy Efficient Power-Management for Out-of-Order Processors Using Cyclic Power-Gating.
Proceedings of the Architecture of Computing Systems - 34th International Conference, 2021

2020
FastPath_MP: Low Overhead & Energy-efficient FPGA-based Storage Multi-paths.
ACM Trans. Archit. Code Optim., 2020

Toward FPGA-Based HPC: Advancing Interconnect Technologies.
IEEE Micro, 2020

Analysis of the Usage Models of System Memory Management Unit in Accelerator-attached Translation Units.
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

2019
Energy Efficient Flash ADC With PVT Variability Compensation Through Advanced Body Biasing.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

On the effects of allocation strategies for exascale computing systems with distributed storage and unified interconnects.
Concurr. Comput. Pract. Exp., 2019

Enabling shared memory communication in networks of MPSoCs.
Concurr. Comput. Pract. Exp., 2019

Scalability analysis of optical Beneš networks based on thermally/electrically tuned Mach-Zehnder interferometers.
Proceedings of the 12th International Workshop on Network on Chip Architectures, 2019

Scaling the capacity of memory systems; evolution and key approaches.
Proceedings of the International Symposium on Memory Systems, 2019

Design Exploration of Multi-tier Interconnection Networks for Exascale Systems.
Proceedings of the 48th International Conference on Parallel Processing, 2019

Enabling Standalone FPGA Computing.
Proceedings of the 2019 IEEE Symposium on High-Performance Interconnects, 2019

Receive-Side Notification for Enhanced RDMA in FPGA Based Networks.
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019

2018
Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development.
Microprocess. Microsystems, 2018

FastPath: Towards Wire-Speed NVMe SSDs.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A CAM-Free Exascalable HPC Router for Low-Energy Communications.
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018

2017
Innovating the Delivery of Server Technology with Kaleao KMAX.
Comput. Sci. Eng., 2017

HyperMAMBO-X64: Using Virtualization to Support High-Performance Transparent Binary Translation.
Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2017


Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach.
Proceedings of the Euromicro Conference on Digital System Design, 2017


Designing an exascale interconnect using multi-objective optimization.
Proceedings of the 2017 IEEE Congress on Evolutionary Computation, 2017

2016
Acoustic emission and angular movement variations from early adulthood healthy knees to late adulthood osteoarthritic knees.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016


ECOSCALE: Reconfigurable computing and runtime system for future exascale systems.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

EUROSERVER: Share-anything scale-out micro-server design.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Acoustic emission sonification and magnetic resonance imaging-based kinematics for exploratory analysis of knee joints.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2016

2014
EUROSERVER: Energy Efficient Node for European Micro-Servers.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
ARM next generation 64bit processors for power efficient compute.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

The evolution of the ARM architecture towards big data and the data-centre (abstract only).
Proceedings of the 8th Workshop on Virtualization in High-Performance Cloud Computing, 2013

From embedded multi-core SoCs to scale-out processors.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
The homogeneity of architecture in a heterogeneous world.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

2011
Smart devices panel session - Integrating the real world interfaces.
Proceedings of the Design, Automation and Test in Europe, 2011

High-Performance Multiprocessor System on Chip: Trends in Chip Architecture for the Mass Market.
Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011

2007
ARM MPCore; The streamlined and scalable ARM11 processor core.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2005
Parallelism and the ARM Instruction Set Architecture.
Computer, 2005


  Loading...