John G. Kenney

According to our database, John G. Kenney authored at least 7 papers between 1988 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

A 12.5-Gb/s self-calibrating linear phase detector-based CDR using 0.18μm SiGe BiCMOS.

Jeremy Walker, John G. Kenney, Jesse Bankman, Terry Chen, Steve Harston, Kenneth Lawas, Andrew Lewine, Richard Soenneker, Michael St. Germain, Ward S. Titus, Andrew Y. Wang, Kimo Tam

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2012

A 5.6 GHz to 11.5 GHz DCO for Digital Dual Loop CDRs.

Ward S. Titus, John G. Kenney

IEEE J. Solid State Circuits, 2012

2006

A 9.95-11.3-Gb/s XFP Transceiver in 0.13-$\mu{\hbox {m}}$ CMOS.

John G. Kenney, Declan Dalton, Eric Evans, Murat Hayri Eskiyerli, Barry Hilton, Dave Hitchcox, Terence Kwok, Daniel Mulcahy, Chris McQuilkin, Viswabharath Reddy, Siva Selvanayagam, Paul Shepherd, Ward S. Titus, Lawrence DeVito

IEEE J. Solid State Circuits, 2006

1995

An enhanced slew rate source follower.

John G. Kenney, Giri Rangan, Karthik Ramamurthy, Gabor C. Temes

IEEE J. Solid State Circuits, February, 1995

1993

High Speed Buffers for Op-amp Characterization.

Giri Rangan, John G. Kenney, Karthik Ramamurthy, Gabor C. Temes

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

On-chip Tests for Gain Bandwidth Product and Slew Rate.

Kartahik Ramamurthy, John G. Kenney, Giri Rangan

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1988

CLANS: a high-level synthesis tool for high resolution data converters.

John G. Kenney, L. Richard Carley

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988