John D. Leidel

Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022

RaiderSTREAM: Adapting the STREAM Benchmark to Modern HPC Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

2021

HAM: Hotspot-Aware Manager for Improving Communications With 3D-Stacked Memory.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

CircusTent: A Tool for Measuring the Performance of Atomic Memory Operations on Emerging Architectures.

[BibT_eX]

[DOI]

Proceedings of the OpenSHMEM and Related Technologies. OpenSHMEM in the Era of Exascale and Smart Networks, 2021

Toward an Automated Hardware Pipelining LLVM Pass Infrastructure.

[BibT_eX]

[DOI]

Ryan Kabrick

David Donofrio

Proceedings of the 7th IEEE/ACM Workshop on the LLVM Compiler Infrastructure in HPC, 2021

xBGAS: A Global Address Space Extension on RISC-V for High Performance Computing.

[BibT_eX]

[DOI]

Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

Toward HDL Extensions for Rapid AI/ML Accelerator Generation.

[BibT_eX]

[DOI]

Ryan Kabrick

David Donofrio

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

DMM-GAPBS: Adapting the GAP Benchmark Suite to a Distributed Memory Model.

[BibT_eX]

[DOI]

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

2020

Toward a Microarchitecture for Efficient Execution of Irregular Applications.

[BibT_eX]

[DOI]

ACM Trans. Parallel Comput., 2020

CircusTent: A Benchmark Suite for Atomic Memory Operations.

[BibT_eX]

[DOI]

Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

PAC: Paged Adaptive Coalescer for 3D-Stacked Memory.

[BibT_eX]

[DOI]

Proceedings of the HPDC '20: The 29th International Symposium on High-Performance Parallel and Distributed Computing, 2020

Remote Atomic Extension (RAE) for Scalable High Performance Computing.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

StoneCutter: a very high level instruction set design language.

[BibT_eX]

[DOI]

David Donofrio

Frank Conlon

Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

2019

PIMS: a lightweight processing-in-memory accelerator for stencil computations.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Memory Systems, 2019

Collective Communication for the RISC-V xBGAS ISA Extension.

[BibT_eX]

[DOI]

Proceedings of the 48th International Conference on Parallel Processing, 2019

MAC: Memory Access Coalescer for 3D-Stacked Memory.

[BibT_eX]

[DOI]

Proceedings of the 48th International Conference on Parallel Processing, 2019

Toward a graph-based dependence analysis framework for high level design verification.

[BibT_eX]

[DOI]

Frank Conlon

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

POSTER: Memory Hotspot Optimization for Data-Intensive Applications.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018

xBGAS: Toward a RISC-V ISA Extension for Global, Scalable Shared Memory.

[BibT_eX]

[DOI]

Farzad Fatollahi-Fard

Kurt Keville

Proceedings of the Workshop on Memory Centric High Performance Computing, 2018

Stake: a coupled simulation environment for RISC-V memory experiments.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Memory Systems, 2018

Memory Coalescing for Hybrid Memory Cube.

[BibT_eX]

[DOI]

Proceedings of the 47th International Conference on Parallel Processing, 2018

GoblinCore-64: A RISC-V Based Architecture for Data Intensive Computing.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

2017

GoblinCore-64: A scalable, open architecture for data intensive high performance computing.

[BibT_eX]

[DOI]

PhD thesis, 2017

HMC-Sim-2.0: A co-design infrastructure for exploring custom memory cube operations.

[BibT_eX]

[DOI]

Parallel Comput., 2017

In-Memory Intelligence.

[BibT_eX]

[DOI]

IEEE Micro, 2017

Pressure-Driven Hardware Managed Thread Concurrency for Irregular Applications.

[BibT_eX]

[DOI]

Proceedings of the Seventh Workshop on Irregular Applications: Architectures and Algorithms, 2017

Bit Contiguous Memory Allocation for Processing In Memory.

[BibT_eX]

[DOI]

Proceedings of the Workshop on Memory Centric Programming for HPC, 2017

OpenMP Memkind: An Extension for Heterogeneous Physical Memories.

[BibT_eX]

[DOI]

Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017

OpenSoC system architect: An open toolkit for building soft-cores on FPGAs.

[BibT_eX]

[DOI]

Farzad Fatollahi-Fard

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016

Concurrent Dynamic Memory Coalescing on GoblinCore-64 Architecture.

[BibT_eX]

[DOI]

Proceedings of the Second International Symposium on Memory Systems, 2016

Exploring Tag-Bit Memory Operations in Hybrid Memory Cubes.

[BibT_eX]

[DOI]

Proceedings of the Second International Symposium on Memory Systems, 2016

HMC-Sim-2.0: A Simulation Platform for Exploring Custom Memory Cube Operations.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015

Communication Avoiding Power Scaling.

[BibT_eX]

[DOI]

Proceedings of the 44th International Conference on Parallel Processing Workshops, 2015

2014

HMC-SIM: A Simulation Framework for Hybrid Memory Cube Devices.

[BibT_eX]

[DOI]

Parallel Process. Lett., 2014

2013

Toward a Scalable Heterogeneous Runtime System for the Convey MX Architecture.

[BibT_eX]

[DOI]