Johannes Müller
Orcid: 0000-0001-6480-6159Affiliations:
- TU Kaiserslautern, Germany
According to our database1,
Johannes Müller
authored at least 13 papers
between 2020 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2024
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors.
IEEE Trans. Computers, 2023
CoRR, 2023
Fault Attacks on Access Control in Processors: Threat, Formal Analysis and Microarchitectural Mitigation.
IEEE Access, 2023
Design of Access Control Mechanisms in Systems-on-Chip with Formal Integrity Guarantees.
Proceedings of the 32nd USENIX Security Symposium, 2023
UPEC-PN: Exhaustive constant time verification of low-level software using property checking.
Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2023
2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
A Formal Approach for Detecting Vulnerabilities to Transient Execution Attacks in Out-of-Order Processors.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020