Johannes M. Mulder

Affiliations:
  • Delft University of Technnology, Department of Electrical Engineering, Netherland
  • University of Stanford, Department of Electrical Engineering, CA, USA


According to our database1, Johannes M. Mulder authored at least 16 papers between 1987 and 2000.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2000
Introducing the IA-64 Architecture.
IEEE Micro, 2000

1992
Processor Architecture and Data Buffering.
IEEE Trans. Computers, 1992

Use of CMOS Technology in Wave Pipelining.
Proceedings of the Fifth International Conference on VLSI Design, 1992

1991
An area model for on-chip memories and its application.
IEEE J. Solid State Circuits, February, 1991

Sequential Architecture Models for Prolog: A Performance Comparison.
New Gener. Comput., 1991

MOVE: a framework for high-performance processor design.
Proceedings of the Proceedings Supercomputing '91, 1991

Software Pipelining for Transport-Triggered Architectures.
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991

1990
A framework for high-speed controller design.
Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990

1989
Inter: An inexpensive inter-procedural register allocator.
Microprocessing and Microprogramming, 1989

A flexible VLSI core for an adaptable architecture.
Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989

Cost-effective design of application specific VLIW processors using the SCARCE framework.
Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989

An Architecture Framework for Application-Specific and Scalable Architectures.
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

Data Buffering: Run-Time Versus Compile-Time Support.
Proceedings of the ASPLOS-III Proceedings, 1989

1988
Efficient macro-code emulation in hardwired pipelined processors.
Proceedings of the 21st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1988, San Diego, California, USA, November 28, 1988

1987
And Now a Case for More Complex Instruction Sets.
Computer, 1987

A Performance Comparison between PLM and a M68020 PROLOG Processor.
Proceedings of the Logic Programming, 1987


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