Johannes Kneip

According to our database1, Johannes Kneip authored at least 17 papers between 1994 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Crop edge detection based on stereo vision.
Robotics Auton. Syst., 2020

2016
An adaptive detection approach for autonomous forest path following using stereo vision.
Proceedings of the 14th International Conference on Control, 2016

2001
MATLAB based codesign framework for wireless broadband communication DSPs.
Proceedings of the IEEE International Conference on Acoustics, 2001

A Design Methodology for High Performance IC's: Wireless Broadband Radio Baseband Case Study.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

2000
The M-PIRE MPEG-4 codec DSP and its macroblock engine.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Foreword.
J. VLSI Signal Process., 1999

Instruction Set Extensions for MPEG-4 Video.
J. VLSI Signal Process., 1999

The MPEG-4 Multimedia Coding Standard: Algorithms, Architectures and Applications.
J. VLSI Signal Process., 1999

Applying and implementing the MPEG-4 multimedia standard.
IEEE Micro, 1999

1998
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors.
J. VLSI Signal Process., 1998

Realization of a Programmable Parallel DSP for High Performance Image Processing Applications.
Proceedings of the 35th Conference on Design Automation, 1998

1997
Objektorientierte Cache-Speicher für programmierbare monolithische Multiprozessoren in der digitalen Bildverarbeitung.
PhD thesis, 1997

An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor.
J. VLSI Signal Process., 1997

1996
Architecture and applications of the HiPAR video signal processor.
IEEE Trans. Circuits Syst. Video Technol., 1996

1995
Architecture and C++-programming environment of a highly parallel image signal processor.
Microprocess. Microprogramming, 1995

Parallelization Resources of Image Processing Algorithms and Their Mapping on a Programmable Parallel Videosignal Processor.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
A data path array with shared memory as core of a high performance DSP.
Proceedings of the International Conference on Application Specific Array Processors, 1994


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