Johannes Fellner

According to our database1, Johannes Fellner authored at least 8 papers between 2004 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
Automated Optimal Resistance Measurement Method for Precision Resistor Stress Response Analysis.
Proceedings of the 47th MIPRO ICT and Electronics Convention, 2024

Analysis of Wheatstone Bridge Sensitivity for Applications in Integrated Piezoresistive Stress Sensors.
Proceedings of the 47th MIPRO ICT and Electronics Convention, 2024

2022
Automated testing of ARM Cortex based SoC with I3C interface and temperature sensor.
Proceedings of the 45th Jubilee International Convention on Information, 2022

2020
Programmable low-frequency divider in 180-nm CMOS technology.
Proceedings of the 43rd International Convention on Information, 2020

Design of a tunable temperature coefficient voltage reference with low-dropout voltage regulator in 180-nm CMOS technology.
Proceedings of the 43rd International Convention on Information, 2020

Design and measurements of low power 32-kHz oscillators and a test interface in 180-nm CMOS technology.
Proceedings of the 43rd International Convention on Information, 2020

2005
A one time programming cell using more than two resistance levels of a polyfuse.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Extraction of material parameters based on inverse modeling of three-dimensional interconnect fusing structures.
Microelectron. J., 2004


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