Johan J. Estrada-López
Orcid: 0000-0002-6064-0371
According to our database1,
Johan J. Estrada-López
authored at least 16 papers
between 2011 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Self-Tuning Model for Energy-Context Optimization in Perpetual Sensor Nodes Within IoT-Integrated Hydroponic Systems.
IEEE Embed. Syst. Lett., September, 2024
2022
Energy-Saving Techniques for Urban Noise WSN With Kalman-Based State Estimation and Green Facade Energy Harvester.
IEEE Trans. Instrum. Meas., 2022
Sensors, 2022
2021
An Energy-Saving Data Statistics-Driven Management Technique for Bio-Powered Indoor Wireless Sensor Nodes.
IEEE Trans. Instrum. Meas., 2021
A CMOS Energy Harvesting Interface Circuit With Cycle-to-Cycle Frequency-to-Amplitude Conversion MPPT for Centimeter-Scale Wind Turbine.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
2020
A Fully Integrated Maximum Power Tracking Combiner for Energy Harvesting IoT Applications.
IEEE Trans. Ind. Electron., 2020
Multiple-Input Harvesting Power Management Unit With Enhanced Boosting Scheme for IoT Applications.
IEEE Trans. Ind. Electron., 2020
A Reconfigurable Rectifier With Optimal Loading Point Determination for RF Energy Harvesting From -22 dBm to -2 dBm.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
A Harmonic-Canceling Synthesizer using Skew-Circulant-Matrix-Based Coefficient Generator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Reconfigurable System for Electromagnetic Energy Harvesting With Inherent Activity Sensing Capabilities for Wearable Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2014
Proceedings of the Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, 2014
2012
Efficient Design of Bit-level Accelerator Architectures for the DEDR-RASF Remote Sensing Algorithm using Super-systolic Arrays.
Proceedings of the PECCS 2012, 2012
2011
Alternative Post-Processing on a CMOS Chip to Fabricate a Planar Microelectrode Array.
Sensors, 2011