Johan Ersfolk

According to our database1, Johan Ersfolk authored at least 14 papers between 2009 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2018
Online Fault Identification of Digital Hydraulic Valves Using a Combined Model-Based and Data-Driven Approach.
CoRR, 2018

A Contract-Based Approach to Scheduling and Verification of Dynamic Dataflow Networks.
Proceedings of the 16th ACM/IEEE International Conference on Formal Methods and Models for System Design, 2018

2017
Detecting data-parallel synchronous dataflow graphs.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2015
Actor Merging for Dataflow Process Networks.
IEEE Trans. Signal Process., 2015

Execution of Dataflow Process Networks on OpenCL Platforms.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

2013
High-performance programs by source-level merging of RVC-CAL dataflow actors.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Static and quasi-static compositions of stream processing applications from dynamic dataflow programs.
Proceedings of the IEEE International Conference on Acoustics, 2013

Modeling control tokens for composition of CAL actors.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012
Scheduling of dynamic dataflow programs based on state space analysis.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

2011
Scheduling of dynamic dataflow programs with model checking.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

2009
The canals language and its compiler.
Proceedings of the 12th International Workshop on Software and Compilers for Embedded Systems, 2009

Design Complexity Management in Embedded System Design.
Proceedings of the 2nd International Workshop on Model Based Architecting and Construction of Embedded Systems ( ACES-MB 2009 ), 2009

Analysis of memory access optimization for motion compensation frames in MPEG-4.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Memory Analysis of Low Power MPEG-4 Decoder Architecture.
Proceedings of the International Conference on Embedded Software and Systems, 2009


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