Joerg Hauptmann

According to our database, Joerg Hauptmann authored at least 5 papers between 1994 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2010

A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS.

Enrique Prefasi, Susana Patón, Luis Hernández, Richard Gaggl, Andreas Wiesbauer, Joerg Hauptmann

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2004

A four-channel ADSL2+ analog front-end for CO applications with 75 mW per channel, built in 0.13-μm CMOS.

Peter Pessl, Richard Gaggl, Johannes Hohl, Dario Giotta, Joerg Hauptmann

IEEE J. Solid State Circuits, 2004

2002

An ADSL-RT full-rate analog front end IC with integrated line driver.

Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann, Thomas Ferianz, Michael Staber, Dietmar Sträußnigg, Berthold Seger

IEEE J. Solid State Circuits, 2002

2001

A 800 mW, full-rate ADSL-RT analog frontend IC with integrated line driver.

Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

1994

A four-channel CMOS codec filter circuit "SICOFI-4".

Michael Tiefenbacher, Peter Caldera, Franz Dielacher, Joerg Hauptmann, Markus Steiner

IEEE J. Solid State Circuits, August, 1994