Joel T. Yuen

According to our database, Joel T. Yuen authored at least 4 papers between 1992 and 1994.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1994

Automated synthesis of pseudo-exhaustive test generator in VLSI BIST design.

Chien-In Henry Chen, Joel T. Yuen

IEEE Trans. Very Large Scale Integr. Syst., 1994

1993

Logic partitioning to pseudo-exhaustive test for BIST design.

Chien-In Henry Chen, Joel T. Yuen

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992

Autonomous-Tol for Hardware Partitioning in a Built-in Self-Test Environment.

Chien-In Henry Chen, Joel T. Yuen, Ji-Der Lee

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Concurrent Test Scheduling in Built-In Self-Test Environment.

Chien-In Henry Chen, Joel T. Yuen

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992