Jochen Reimers

According to our database, Jochen Reimers authored at least 4 papers between 1990 and 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1995

Architecture and Memory Requirements for Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Synchronous DRAMs.

Marco Winzker, Peter Pirsch, Jochen Reimers

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1993

A VLSI chip set for DPCM coding of HDTV signals.

Josef Kraus, Jochen Reimers, Klaus Grüger

IEEE Trans. Circuits Syst. Video Technol., 1993

Realization of a real time phasecorrelation chipset used in a hierarchical two step HDTV motion vector estimator.

K. Müller, Frank Schirrmeister, Christian von Reventlow, Dirk Siebert, Jochen Reimers, C. Stoffers

Proceedings of the International Conference on Application-Specific Array Processors, 1993

1990

VLSI components for a 560-Mbit/s HDTV codec.

Klaus Grüger, Peter Pirsch, Josef Kraus, Jochen Reimers

Proceedings of the Visual Communications and Image Processing '90: Fifth in a Series, 1990