Joar Sohl
According to our database1,
Joar Sohl
authored at least 17 papers
between 2009 and 2015.
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Bibliography
2015
Efficient Compilation for Application Specific Instruction set DSP Processors with Multi-bank Memories.
PhD thesis, 2015
Proceedings of the 2015 IEEE TrustCom/BigDataSE/ISPA, 2015
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
2013
Proceedings of the 20th Annual International Conference on High Performance Computing, 2013
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013
2012
Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012
Convolutional Decoding on Deep-pipelined SIMD Processor with Flexible Parallel Memory.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
2011
Proceedings of the Second International Conference on Networking and Computing, 2011
Case Study of Efficient Parallel Memory Access Programming for the Embedded Heterogeneous Multicore DSP Architecture ePUMA.
Proceedings of the International Conference on Complex, 2011
A multi-level arbitration and topology free streaming network for chip multiprocessor.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
Proceedings of the 8th International Conference on Information, 2011
2010
Parallel Programming and Its Architectures Based on Data Access Separated Algorithm Kernels.
Int. J. Embed. Real Time Commun. Syst., 2010
Architectural Support for Reducing Parallel Processing Overhead in an Embedded Multiprocessor.
Proceedings of the IEEE/IFIP 8th International Conference on Embedded and Ubiquitous Computing, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
2009
Proceedings of the Advanced Parallel Processing Technologies, 8th International Symposium, 2009