Jizhong Shen

According to our database, Jizhong Shen authored at least 30 papers between 1990 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Research on electromagnetic interference resistance performance of three kinds of CMOS inverters.

Fangjun Liu, Jiaming Shen, Jizhong Shen

Frontiers Inf. Technol. Electron. Eng., October, 2024

Symbolic-functional representation inference for gate-level power estimation.

Zejia Lyu, Jizhong Shen

Microelectron. J., 2024

An efficient algorithm for estimating gate-level power consumption in large-scale integrated circuits.

Zejia Lyu, Jizhong Shen

Microelectron. J., 2024

2023

Design of current steering logic CMOS circuit.

Jiaming Shen, Fangjun Liu, Jizhong Shen

Microelectron. J., November, 2023

2022

FreSCo: Frequency-Domain Scan Context for LiDAR-based Place Recognition with Translation and Rotation Invariance.

Yongzhi Fan, Xin Du, Jizhong Shen

CoRR, 2022

Localization of seizure onset zone with epilepsy propagation networks based on graph convolutional network.

Xiaochen Liu, Lingli Hu, Shuang Wang, Jizhong Shen

Biomed. Signal Process. Control., 2022

FreSCo: Frequency-Domain Scan Context for LiDAR-based Place Recognition with Translation and Rotation Invariance.

Yongzhi Fan, Xin Du, Lun Luo, Jizhong Shen

Proceedings of the 17th International Conference on Control, 2022

2021

Low-rate DoS attack detection method based on hybrid deep neural networks.

Congyuan Xu, Jizhong Shen, Xin Du

J. Inf. Secur. Appl., 2021

2020

A Method of Few-Shot Network Intrusion Detection Based on Meta-Learning Framework.

Congyuan Xu, Jizhong Shen, Xin Du

IEEE Trans. Inf. Forensics Secur., 2020

Web page classification based on heterogeneous features and a combination of multiple classifiers.

Li Deng, Xin Du, Jizhong Shen

Frontiers Inf. Technol. Electron. Eng., 2020

2019

Detection method of domain names generated by DGAs based on semantic representation and deep neural network.

Congyuan Xu, Jizhong Shen, Xin Du

Comput. Secur., 2019

P300-based deception detection of mock network fraud with modified genetic algorithm and combined classification.

Xiaochen Liu, Jizhong Shen, Wufeng Zhao

Proceedings of the 7th International Winter Conference on Brain-Computer Interface, 2019

2018

An Intrusion Detection System Using a Deep Neural Network With Gated Recurrent Units.

Congyuan Xu, Jizhong Shen, Xin Du, Fan Zhang

IEEE Access, 2018

2017

Function synthesis algorithm based on RTD-based three-variable universal logic gates.

Maoqun Yao, Kai Yang, Jizhong Shen, Congyuan Xu

Frontiers Inf. Technol. Electron. Eng., 2017

An algorithm for identifying symmetric variables based on the order eigenvalue matrix.

Xiao-hua Li, Jizhong Shen

Frontiers Inf. Technol. Electron. Eng., 2017

Transistor level SCA-resistant scheme based on fluctuating power logic.

Liang Geng, Fan Zhang, Jizhong Shen, Wei He, Shivam Bhasin, Xinjie Zhao, Shize Guo

Sci. China Inf. Sci., 2017

Improved low-entropy masking scheme for LED with mitigation against correlation-enhanced collision attacks.

Fan Zhang, Liang Geng, Jizhong Shen, Shivam Bhasin, Xinjie Zhao, Shize Guo

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016

Power-efficient dual-edge implicit pulse-triggered flip-flop with an embedded clock-gating scheme.

Liang Geng, Jizhong Shen, Congyuan Xu

Frontiers Inf. Technol. Electron. Eng., 2016

An Algorithm for Identifying Symmetric Variables in the Canonical Reed-Muller Algebra System.

Xiaohua Li, Jizhong Shen

J. Circuits Syst. Comput., 2016

Design of flip-flops with clock-gating and pull-up control scheme for power-constrained and speed-insensitive applications.

Liang Geng, Jizhong Shen, Congyuan Xu

IET Comput. Digit. Tech., 2016

2015

Design of a novel RTD-based three-variable universal logic gate.

Maoqun Yao, Kai Yang, Congyuan Xu, Jizhong Shen

Frontiers Inf. Technol. Electron. Eng., 2015

Function Synthesis Algorithm of RTD-Based Universal Threshold Logic Gate.

Maoqun Yao, Kai Yang, Congyuan Xu, Jizhong Shen

J. Appl. Math., 2015

2012

Design of nanopipelined adder based on resonant tunneling diode.

Yi Wei, Jizhong Shen

Microelectron. J., 2012

2011

Novel universal threshold logic gate based on RTD and its application.

Yi Wei, Jizhong Shen

Microelectron. J., 2011

Design of a novel low power 8-transistor 1-bit full adder cell.

Yi Wei, Jizhong Shen

J. Zhejiang Univ. Sci. C, 2011

1996

Fuzzy Language on Free Monoid.

Jizhong Shen

Inf. Sci., 1996

1995

Race-Hazard and Skip-Hazard in Multivalued Combinational Circuits.

Xunwei Wu, Xiexiong Chen, Jizhong Shen

Proceedings of the 25th IEEE International Symposium on Multiple-Valued Logic, 1995

1993

Fuzzifying groups based on complete residuated lattice-valued logic.

Jizhong Shen

Inf. Sci., 1993

1992

Fuzzifying Topological Groups Based on Completely Distributive Residuated Lattice-Valued Logic (I).

Jizhong Shen

Proceedings of the 22nd IEEE International Symposium on Multiple-Valued Logic, 1992

1990

On fuzzy regular subsemigroups of a semigroup.

Jizhong Shen

Inf. Sci., 1990