Jitendra Nath Roy
Orcid: 0000-0001-6707-5793
According to our database1,
Jitendra Nath Roy
authored at least 12 papers
between 2007 and 2022.
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Bibliography
2022
Subthreshold model of asymmetric GAA junctionless FETs with scaled equivalent oxide thickness.
Microelectron. J., 2022
2021
Analysis of new all optical polarization-encoded Dual SOA-based ternary NOT & XOR gate with simulation.
Photonic Netw. Commun., 2021
2019
2D Surface potential and mobility modelling of doped/undoped symmetric double gate MOSFET.
IET Circuits Devices Syst., 2019
2017
Photonic Netw. Commun., 2017
2014
Manchester code generation scheme using micro-ring resonator based all optical switch.
Proceedings of the 9th International Symposium on Communication Systems, 2014
2011
All-optical binary to gray code and gray to binary code conversion scheme with the help of semiconductor optical amplifier-assisted sagnac switch.
IET Circuits Devices Syst., 2011
Interferometric switch based all optical scheme for conversion of binary number to its quaternary-signed digit form.
IET Circuits Devices Syst., 2011
All-Optical Binary-Coded Decimal Adder with a Terahertz Optical Asymmetric Demultiplexer.
Comput. Sci. Eng., 2011
Proceedings of the Advances in Computing and Communications, 2011
2010
All-optical binary flip-flop with the help of Terahertz Optical Asymmetric Demultiplexer.
Nat. Comput., 2010
J. Circuits Syst. Comput., 2010
2007
Tree-net architecture for integrated all-optical arithmetic operations and data comparison scheme with optical nonlinear material.
Opt. Switch. Netw., 2007