Jitendra Kumar Mishra
Orcid: 0000-0003-4601-2325
According to our database1,
Jitendra Kumar Mishra
authored at least 6 papers
between 2013 and 2021.
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Bibliography
2021
Design and Analysis of SRAM Cell using Negative Bit-Line Write Assist Technique and Separate Read Port for High-Speed Applications.
J. Circuits Syst. Comput., 2021
Design and Analysis of SRAM cell using Body Bias Controller for Low Power Applications.
Circuits Syst. Signal Process., 2021
2020
Design of SRAM cell using Voltage Lowering and Stacking Techniques for Low Power Applications.
Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020
2019
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019
2018
A 40nm Low Power High Stable SRAM Cell Using Separate Read Port and Sleep Transistor Methodology.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2018
2013
Proceedings of the 6th IEEE International Conference on Advanced Infocomm Technology, 2013