Jitendra Kanungo

According to our database1, Jitendra Kanungo authored at least 5 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2024
An error-efficient Gaussian filter for image processing by using the expanded operand decomposition logarithm multiplication.
J. Ambient Intell. Humaniz. Comput., January, 2024

2017
An efficient VLSI architecture design for logarithmic multiplication by using the improved operand decomposition.
Integr., 2017

2014
Sinusoidal Clocked Sense-amplifier-Based Energy Recovery flip-Flops.
J. Circuits Syst. Comput., 2014

2013
Energy estimation for n-input Adiabatic Logic gate: a Proposed Analytical Model.
J. Circuits Syst. Comput., 2013

2011
An Efficient Single Phase Adiabatic Logic and Its Application to Combinational and Sequential Design.
J. Low Power Electron., 2011


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