Jisu Min
Orcid: 0000-0003-2924-9187
According to our database1,
Jisu Min
authored at least 4 papers
between 2018 and 2022.
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Bibliography
2022
A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2019
A Study of Read Margin Enhancement for 3T2R Nonvolatile TCAM Using Adaptive Bias Training.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Power Efficient and Reliable Nonvolatile TCAM With Hi-PFO and Semi-Complementary Driver.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
2018
Low Power Search Engine using Non-volatile Memory based TCAM with Priority Encoding and Selective Activation of Search Line and Match Line.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018