Jiro Naganuma
According to our database1,
Jiro Naganuma
authored at least 22 papers
between 1988 and 2012.
Collaborative distances:
Collaborative distances:
Timeline
1990
1995
2000
2005
2010
0
1
2
3
4
5
6
1
1
2
1
1
2
1
2
1
1
1
1
2
3
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2012
An H.264/AVC High422 Profile and MPEG-2 422 Profile Encoder LSI for HDTV Broadcasting Infrastructures.
IEICE Trans. Electron., 2012
2010
MPEG-2 Transcoding Method for Reducing Re-quantization Noise Based on a Two-tiered Quantizer Matrix.
Inf. Media Technol., 2010
2008
IEICE Trans. Inf. Syst., 2008
A Distributed Stream Multiplexing Architecture for Multi-Chip Configuration beyond HDTV.
IEICE Trans. Inf. Syst., 2008
Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level.
IEEE Trans. Very Large Scale Integr. Syst., 2007
2006
Syst. Comput. Jpn., 2006
2005
New set-top box for interactive visual communication of home entertainment using MPEG-2 full-duplex CODEC LSI.
IEEE Trans. Consumer Electron., 2005
MPEG-2 real-time software CODEC for full-duplex transmission application over IP networks.
Syst. Comput. Jpn., 2005
2004
A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level.
Proceedings of the 2003 Design, 2003
A 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
2002
Syst. Comput. Jpn., 2002
1999
IEEE Trans. Very Large Scale Integr. Syst., 1999
Proceedings of the 6th International Workshop on Real-Time Computing and Applications Symposium (RTCSA '99), 1999
High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit.
Proceedings of the 1999 Design, 1999
An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture.
Proceedings of the 1999 Design, 1999
1996
Proceedings of the 1996 European Design and Test Conference, 1996
1994
A Highly OR-Parallel Inference Machine (Multi-ASCA) and Its Performance Evaluation: An Architecture and Its Load Balancing Algorithms.
IEEE Trans. Computers, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
1988
IEEE Trans. Computers, 1988