Jiri Gaisler

According to our database1, Jiri Gaisler authored at least 7 papers between 1994 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2007
Dynamic Voltage Scaling in a FPGA-based System-on-Chip.
Proceedings of the FPL 2007, 2007

2006
LEON-2: General Purpose Processor for a Wireless Engine.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2004
Panel Summary Statements.
Proceedings of the 10th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2004), 2004

An open-source VHDL IP library with Plug&Play configuration.
Proceedings of the Building the Information Society, 2004

2002
A Portable and Fault-Tolerant Microprocessor Based on the SPARC V8 Architecture.
Proceedings of the 2002 International Conference on Dependable Systems and Networks (DSN 2002), 2002

1997
Evaluation of a 32-bit Microprocessor with Built-in Concurrent Error-Detection.
Proceedings of the Digest of Papers: FTCS-27, 1997

1994
Concurrent Error-Detection and Modular Fault-tolerance in a 32-bit Processing Core for Embedded Space Flight Applications.
Proceedings of the Digest of Papers: FTCS/24, 1994


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