Jiovana Sousa Gomes

Orcid: 0000-0002-9910-7347

According to our database1, Jiovana Sousa Gomes authored at least 5 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Statistical Analysis of VVC Residual and Entropy Coding aiming Efficient Hardware Design.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

2023
AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Analysis of AV1 Arithmetic Decoder Design Space with a Novel Multi-Boolean Approach.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022
Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder.
IEEE Des. Test, 2022

Area and Power Efficient 8K Real-Time Design for AV1 Arithmetic Decoding.
Proceedings of the Picture Coding Symposium, 2022


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