Jinyoung Lim

According to our database, Jinyoung Lim authored at least 3 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Breakthrough Design Technology Co-optimization using BSPDN and Standard Cell Variants for Maximizing Block-level PPA.

Seungyoung Lee, Sungyup Jung, Yunkyeong Jang, Jungho Do, Jisu Yu, Hyeoungyu You, Minjae Jeong, Jinyoung Lim, Jiyun Han, Sangdo Park, Yongdeok Kim, Jooyeon Kwon, Hoonki Kim, Seiseung Yoon

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process.

Giyoung Yang, Hakchul Jung, Jinyoung Lim, Jaewoo Seo, Ingyum Kim, Jisu Yu, Hyeoungyu You, Jeongsoon Kong, Garoom Kim, Minjae Jeong, Chanhee Park, Sera An, Woojin Rim, Hayoung Kim, Dalhee Lee, Sanghoon Baek, Jonghoon Jung, Taejoong Song, Jongwook Kye

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2017

12.2 A 7nm FinFET SRAM macro using EUV lithography for peripheral repair analysis.

Taejoong Song, Hoonki Kim, Woojin Rim, Yongho Kim, Sunghyun Park, Changnam Park, Minsun Hong, Giyong Yang, Jeongho Do, Jinyoung Lim, Seungyoung Lee, Ingyum Kim, Sanghoon Baek, Jonghoon Jung, Daewon Ha, Hyungsoon Jang, Taejung Lee, Chul-Hong Park, Bongjae Kwon, Hyuntaek Jung, Sungwee Cho, Yongjae Choo, Jaeseung Choi

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017