Jinli Rao

Orcid: 0000-0001-7663-2184

According to our database1, Jinli Rao authored at least 7 papers between 2010 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
ARCE: Towards Code Pointer Integrity on Embedded Processors Using Architecture-Assisted Run-Time Metadata Management.
IEEE Comput. Archit. Lett., 2019

2018
Design Exploration of SHA-3 ASIP for IoT on a 32-bit RISC-V Processor.
IEICE Trans. Inf. Syst., 2018

2016
BFWindow: Speculatively Checking Data Property Consistency against Buffer Overflow Attacks.
IEICE Trans. Inf. Syst., 2016

2014
A Compact Hardware Implementation of SM3 Hash Function.
Proceedings of the 13th IEEE International Conference on Trust, 2014

2011
Implementation and evaluation of parallel FFT on Engineering and Scientific Computation Accelerator (ESCA) architecture.
J. Zhejiang Univ. Sci. C, 2011

2010
A High Efficient On-Chip Interconnection Network in SIMD CMPs.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2010

The parallel algorithm implementation of matrix multiplication based on ESCA.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010


  Loading...