Jingshu Yu

According to our database, Jingshu Yu authored at least 7 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Monolithic 5.7A/mm² 91% Peak Efficiency Scalable Multi-Stage Modular Switched Capacitor Voltage Regulator with Self-Timed Deadtime and Safe Startup for 3D-ICs.

Jingshu Yu, Xiaosen Liu, Minxiang Gong, Nicolas Butzen, Sheldon Weng, Harish K. Krishnamurthy, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, Waldemer Jim, Christopher Pelto, James W. Tschanz, Vivek De

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

14.9 A Monolithic 10.5W/mm²600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOS.

Suhwan Kim, Harish K. Krishnamurthy, Zakir Ahmed, Nachiket V. Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

28.4 A Monolithic 12.7W/mm² Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter.

Nicolas Butzen, Harish Krishnamurthy, Jingshu Yu, Khondker Zakir Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Chris Pelto, James W. Tschanz

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A 92%-Efficiency 0.828μs Settling Time FC5L Voltage Regulator Featuring Time-Domain Charge Balancing & Flying Capacitor Self-Switching for Wide Dynamic Range & Fast Transient Chiplet Applications.

Xichen Sun, Jingshu Yu, Xuliang Wang, Jin Wei, Junmin Jiang, Chenchang Zhan, Yan Wang, Xiaosen Liu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2022

A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors.

Nachiket V. Desai, Han Wui Then, Jingshu Yu, Harish K. Krishnamurthy, William J. Lambert, Nicolas Butzen, Sheldon Weng, Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De

IEEE J. Solid State Circuits, 2022

2021

A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors.

Nachiket V. Desai, Harish K. Krishnamurthy, William J. Lambert, Jingshu Yu, Han Wui Then, Nicolas Butzen, Sheldon Weng, Christopher Schaef, N. Nidhi, Marko Radosavljevic, Johann Rode, Justin Sandford, Kaladhar Radhakrishnan, Krishnan Ravichandran, Bernhard Sell, James W. Tschanz, Vivek De

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2019

Smart Gate Driver ICs for GaN Power Transistors.

Wei Jia Zhang, Jingshu Yu, Wai Tung Ng

Proceedings of the 13th IEEE International Conference on ASIC, 2019