Jingci Yang

Orcid: 0000-0002-5365-1101

According to our database1, Jingci Yang authored at least 8 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Knowledge Transfer Framework for PVT Robustness in Analog Integrated Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024

2022
A 15 mV-input and 71%-efficiency boost converter with 22 mV output ripple for thermoelectric energy harvesting application.
Microelectron. J., 2022

Optimization of CMOS Voltage reference with Prediction based on Multi-group Hierarchical Collaborative Evolution and GBDT.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
A 77-nA and Three-Output CMOS Voltage Reference with -73dB PSRR for Energy Harvesting Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
A 3.9 ppm/<sup>○</sup>C, 31.5 ppm/V ultra-low-power subthreshold CMOS-only voltage reference.
Microelectron. J., 2020

Automatic Structure Generation and Parameter Optimization for CMOS Voltage Reference Circuit.
IEEE Access, 2020

High-PSR and fast-transient LDO regulator with nested adaptive FVF structure.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

High PSR output-capacitor-less LDO with double buffers technique.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020


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