Jing Chen

Orcid: 0000-0001-9008-3556

Affiliations:
  • Nanjing University of Posts and Telecommunications, College of Electronic and Optical Engineering / College of Microelectronics, China


According to our database1, Jing Chen authored at least 6 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2020
2021
2022
2023
2024
2025
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2
3
4
3
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Legend:

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Links

Online presence:

On csauthors.net:

Bibliography

2025
Self-adaptive body bias tuning technique for enhancing Baliga's figure-of-merit (BFOM) in thin bulk silicon LDMOS.
Microelectron. J., 2025

A novel double-trench SiC SBD-embedded MOSFET with improved figure-of-merit and short-circuit ruggedness.
Microelectron. J., 2025

A cross-scale investigation on transient electrothermal performance for power MOSFETs at device-package level.
Microelectron. J., 2025

2024
General neural network-based static performance prediction model construction techniques for gate-all-around and planar field effect transistor.
Microelectron. J., 2024

Step thickness drift region automatic design of SOI LDMOS using physics-inspired constrained simulated annealing algorithm.
Microelectron. J., 2024

2020
Powernet: SOI Lateral Power Device Breakdown Prediction With Deep Neural Networks.
IEEE Access, 2020


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