Jin-Woo Han

Orcid: 0000-0002-5118-1310

According to our database1, Jin-Woo Han authored at least 18 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2024
Mitigation of Single Event Upset Effects in Nanosheet FET 6T SRAM Cell.
IEEE Access, 2024

Cell to Core-Periphery Overlap (C2O) Based on BCAT for Next Generation DRAM.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
Investigation Into the Degradation of DDR4 DRAM Owing to Total Ionizing Dose Effects.
IEEE Access, 2023

Overhang Saddle Fin Sidewall Structure for Highly Reliable DRAM Operation.
IEEE Access, 2023

Radiation-Hardened Processing-In-Memory Crossbar Array With Hybrid Synapse Devices for Space Application.
Proceedings of the International Conference on Electronics, Information, and Communication, 2023

2022
Energy- and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Evolutionary Learning of Binary Neural Network Using a TaOx Memristor via Stochastic Stateful Logic.
Adv. Intell. Syst., 2022

2021
Surface Potential-Controlled Oscillation in FET-Based Biosensors.
Sensors, 2021

A Unified Method for Deinterleaving and PRI Modulation Recognition of Radar Pulses Based on Deep Neural Networks.
IEEE Access, 2021

Single Event Hard Error due to Terrestrial Radiation.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020
Comparing Variation-tolerance and SEU/TID-Resilience of Three SRAM Cells in 28nm FD-SOI Technology: 6T, Quatro, and we-Quatro.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Electron Emission Devices for Energy-Efficient Systems.
Adv. Intell. Syst., 2019

2018
A 28mn FD-SOI 4KB Radiation-hardened 12T SRAM Macro with 0.6 ~ 1V Wide Dynamic Voltage Scaling for Space Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2016
A CMOS-compatible boosted transistor having >2× drive current and low leakage current.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
Effect of source and drain asymmetry on hot carrier degradation in vertical nanowire MOSFETs.
Microelectron. Reliab., 2015

2014
Hot carrier and PBTI induced degradation in silicon nanowire gate-all-around SONOS MOSFETs.
Microelectron. Reliab., 2014

Emitter location based on the linearization of quadratic TDOA and FDOA curves.
Proceedings of the International Conference on Electronics, Information and Communications, 2014

2010
Pulse Repetition Interval Modulation Recognition Using Symbolization.
Proceedings of the International Conference on Digital Image Computing: Techniques and Applications, 2010


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