Jiezhi Chen

Orcid: 0000-0003-2996-1406

According to our database1, Jiezhi Chen authored at least 30 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Operation Scheme Optimizations to Achieve Ultra-high Endurance (1010) in Flash Memory with Robust Reliabilities.
CoRR, 2024

Unveiling Cryogenic Performance (4 to 300 K) Towards Ultra-Thin Ferroelectric HZO: Novel Kinetic Barrier Engineering and Underlying Mechanism.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

First Demonstration of BEOL-Compatible 3D Vertical FeNOR.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
Near-threshold-voltage operation in flash-based high-precision computing-in-memory to implement Poisson image editing.
Sci. China Inf. Sci., December, 2023

High-Precision Short-Term Lifetime Prediction in TLC 3-D NAND Flash Memory as Hot-Data Storage.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023

Dual-pulse disturb-free programming scheme for FeFET based neuromorphic computing.
Microelectron. J., 2023

Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Error Bits Recovering in 3D NAND Flash Memory: A Novel State-Shift Re-Program (SRP) Scheme.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

Opto-Electronic Monolayer ZnO Memristor Produced via Low Temperature Atomic Layer Deposition.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

Simulation for the Feasibility of IGZO Channel in 3D Vertical FeFET Memory Based on TCAD.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

One-shot Read Processing to Enhance Cold Data Retention in Charge-trap TLC 3D NAND Flash.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

Flash-based Computing-in-memory Architectures with High-accuracy and Robust Reliabilities for General-purpose Applications.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022
Experimentally-Validated Crossbar Model for Defect-Aware Training of Neural Networks.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Optimal Program-Read Schemes Toward Highly Reliable Open Block Operations in 3-D Charge-Trap NAND Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Spatiotemporal Pattern Analysis of Land Use Functions in Contiguous Coastal Cities Based on Long-Term Time Series Remote Sensing Data: A Case Study of Bohai Sea Region, China.
Remote. Sens., 2022

Long Time-Series Mapping and Change Detection of Coastal Zone Land Use Based on Google Earth Engine and Multi-Source Data Fusion.
Remote. Sens., 2022

Voltage and temperature dependence of Random Telegraph Noise and their impacts on random number generator.
Microelectron. J., 2022

Insights of VG-dependent threshold voltage fluctuations from dual-point random telegraph noise characterization in nanoscale transistors.
Sci. China Inf. Sci., 2022

Large Suppression to Lateral Charge Migration (LCM) Related Error Bits in Charge-Trap TLC 3D NAND Flash.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

Re-LSM: A ReRAM-Based Processing-in-Memory Framework for LSM-Based Key-Value Store.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Work-in-Progress: High-Precision Short-Term Lifetime Prediction in TLC 3D NAND Flash Memory as Hot-data Storage.
Proceedings of the International Conference on Compilers, 2022

2021
Flash memory based computing-in-memory system to solve partial differential equations.
Sci. China Inf. Sci., 2021

Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory.
IEEE Access, 2021

Bits Mapping in Triple-level-cell (TLC) Charge-trap (CT) 3D NAND Flash Memory and its Applications to IoT Security.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

2020
Retention Correlated Read Disturb Errors in 3-D Charge Trap NAND Flash Memory: Observations, Analysis, and Solutions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Dual-Point Technique for Multi-Trap RTN Signal Extraction.
IEEE Access, 2020

2019
Scaling Behaviour of State-to-State Coupling During Hole Trapping at Si/SiO2.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Program/Erase Cycling Enhanced Lateral Charge Diffusion in Triple-Level Cell Charge-Trapping 3D NAND Flash Memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2011
Design and analysis of effective price for congestion control.
Proceedings of the IEEE 36th Conference on Local Computer Networks, 2011

An Artificial Intelligence Approach to Price Design for Improving AQM Performance.
Proceedings of the Global Communications Conference, 2011


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