Jieyi Long

Orcid: 0009-0007-4646-7131

According to our database1, Jieyi Long authored at least 25 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
SPRING: Improving the Throughput of Sharding Blockchain via Deep Reinforcement Learning Based State Placement.
Proceedings of the ACM on Web Conference 2024, 2024

Embracing Adaptation: An Effective Dynamic Defense Strategy Against Adversarial Examples.
Proceedings of the 32nd ACM International Conference on Multimedia, MM 2024, Melbourne, VIC, Australia, 28 October 2024, 2024

Adversarial Distillation Based on Slack Matching and Attribution Region Alignment.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024

2023
Efficient Arguments and Proofs for Batch Arithmetic Circuit Satisfiability.
IACR Cryptol. ePrint Arch., 2023

Large Language Model Guided Tree-of-Thought.
CoRR, 2023

A Dual-Agent Scheduler for Distributed Deep Learning Jobs on Public Cloud via Reinforcement Learning.
Proceedings of the 29th ACM SIGKDD Conference on Knowledge Discovery and Data Mining, 2023

Proof-of-Contribution-Based Design for Collaborative Machine Learning on Blockchain.
Proceedings of the IEEE International Conference on Decentralized Applications and Infrastructures, 2023

2021
Off-Chain Micropayment Pool for High-ThroughputBandwidth Sharing Rewards.
CoRR, 2021

Off-Chain Micropayment Pool for High-Throughput Bandwidth Sharing Rewards.
Proceedings of the IEEE International Conference on Blockchain and Cryptocurrency, 2021

2019
Nakamoto Consensus with Verifiable Delay Puzzle.
CoRR, 2019

Scalable BFT Consensus Mechanism Through Aggregated Signature Gossip.
Proceedings of the IEEE International Conference on Blockchain and Cryptocurrency, 2019

2018
BDCP: A Framework for Big Data Copyright Protection Based on Digital Watermarking.
Proceedings of the Security, Privacy, and Anonymity in Computation, Communication, and Storage, 2018

2013
Theory and Analysis for Optimization of On-Chip Thermoelectric Cooling Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2010
SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Optimization of an on-chip active cooling system based on thin-film thermoelectric coolers.
Proceedings of the Design, Automation and Test in Europe, 2010

Inversed Temperature Dependence aware clock skew scheduling for sequential circuits.
Proceedings of the Design, Automation and Test in Europe, 2010

Optimization of the bias current network for accurate on-chip thermal monitoring.
Proceedings of the Design, Automation and Test in Europe, 2010

A framework for optimizing thermoelectric active cooling systems.
Proceedings of the 47th Design Automation Conference, 2010

2008
Optimizing Thermal Sensor Allocation for Microprocessors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

EBOARST: An Efficient Edge-Based Obstacle-Avoiding Rectilinear Steiner Tree Construction Algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Thermal monitoring mechanisms for chip multiprocessors.
ACM Trans. Archit. Code Optim., 2008

An <i>O</i>(<i>n</i>log<i>n</i>) edge-based algorithm for obstacle-avoiding rectilinear steiner tree construction.
Proceedings of the 2008 International Symposium on Physical Design, 2008

Automated design of self-adjusting pipelines.
Proceedings of the 45th Design Automation Conference, 2008

2007
A self-adjusting clock tree architecture to cope with temperature variations.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2005
An improved test access mechanism structure and optimization technique in system-on-chip.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005


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