Jie Yu
Affiliations:- Chinese Academy of Sciences, Institute of Microelectronics, Key Laboratory of Microelectronics Devices & Integrated Technology, Beijing, China
According to our database1,
Jie Yu
authored at least 9 papers
between 2019 and 2024.
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Bibliography
2024
High-efficient and Comprehensive Modeling of MFIM Ferroelectric Tunnel Junctions for Non-volatile/Volatile Applications.
Proceedings of the IEEE International Memory Workshop, 2024
2023
Freely switching between ferroelectric and resistive switching in Hf0.5Zr0.5O2 films and its application on high accuracy on-chip deep neural networks.
Sci. China Inf. Sci., February, 2023
2022
A 0.02% Accuracy Loss Voltage-Mode Parallel Sensing Scheme for RRAM-Based XNOR-Net Application.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm<sup>2</sup>) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2021
Investigation of weight updating modes on oxide-based resistive switching memory synapse towards neuromorphic computing applications.
Sci. China Inf. Sci., 2021
24.2 A 14nm-FinFET 1Mb Embedded 1T1R RRAM with a 0.022µ m<sup>2</sup> Cell Size Using Self-Adaptive Delayed Termination and Multi-Cell Reference.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the IEEE International Memory Workshop, 2021
Effect of conductive filament morphology on soft error of oxide based Resistive Random Access Memory.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
2019
A 0.75 V reference clamping sense amplifier for low-power high-density ReRAM with dynamic pre-charge technique.
IEICE Electron. Express, 2019