Jie Sun

According to our database, Jie Sun authored at least 9 papers between 2016 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

An Efficient High SFDR PDDS Using High-Pass-Shaped Phase Dithering.

Chenggang Yan, Jie Sun, Weiqiang Liu

IEEE Trans. Very Large Scale Integr. Syst., 2021

Correlation-Based Background Calibration of Bit Weight in SAR ADCs Using DAS Algorithm.

Lizhen Zhang, Peng Wang, Jie Sun, Jianhui Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Background Calibration for Bit Weights in Pipelined ADCs Using Adaptive Dither Windows.

Jie Sun, Xin Ding, Chenggang Yan, Weiqiang Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A 2-Then-1 Bit/Cycle Asynchronous SAR ADC with Background Offset Calibration.

Jie Sun, Jun Huang, Jianhui Wu, Weiqiang Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 10-b 500MS/s Partially Loop-Unrolled SAR ADC with a Comparator Offset Calibration Technique.

Chao Chen, Jie Sun, Chenghua Wang, Weiqiang Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Background Calibration of Bit Weights in Pipelined-SAR ADCs Using Paired Comparators.

Jie Sun, Minglei Zhang, Lei Qiu, Jianhui Wu, Weiqiang Liu

IEEE Trans. Very Large Scale Integr. Syst., 2020

A Low Phase Noise Open Loop Fractional-N Frequency Synthesizer With Injection Locking Digital Phase Modulator.

Chenggang Yan, Jianhui Wu, Jie Sun, Jin Jin, Chen Hu

IEEE Trans. Circuits Syst. II Express Briefs, 2020

2019

A 12-bit 350 MS/s Single-Channel Pipeline ADC with 75 dB SFDR in 0.18 μm BiCMOS.

Jie Sun, Jianhui Wu

J. Circuits Syst. Comput., 2019

2016

A high speed pipeline ADC with 78-dB SFDR in 0.18 um BiCMOS.

Jie Sun, Jianhui Wu

Proceedings of the International Symposium on Integrated Circuits, 2016