Jie Lin

According to our database, Jie Lin authored at least 12 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations.

Chen Nie, Chenyu Tang, Jie Lin, Huan Hu, Chenyang Lv, Ting Cao, Weifeng Zhang, Li Jiang, Xiaoyao Liang, Weikang Qian, Yanan Sun, Zhezhi He

IEEE Trans. Computers, October, 2024

2022

Self-Terminating Write of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing.

Zongwu Wang, Zhezhi He, Rui Yang, Shiquan Fan, Jie Lin, Fangxin Liu, Yueyang Jia, Chenxi Yuan, Qidong Tang, Li Jiang

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Resilient and Secure Hardware Devices Using ASL.

Qutaiba Alasad, Jie Lin, Jiann-Shuin Yuan, Deliang Fan, Amro Awad

ACM J. Emerg. Technol. Comput. Syst., 2021

Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support.

Chen Nie, Jie Lin, Huan Hu, Li Jiang, Xiaoyao Liang, Zhezhi He

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

A scalable and reconfigurable in-memory architecture for ternary deep spiking neural network with ReRAM based neurons.

Jie Lin, Jiann-Shiun Yuan

Neurocomputing, 2020

2019

Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping.

Zhezhi He, Jie Lin, Rickard Ewetz, Jiann-Shiun Yuan, Deliang Fan

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Analysis and Simulation of Capacitor-Less ReRAM-Based Stochastic Neurons for the in-Memory Spiking Neural Network.

Jie Lin, Jiann-Shiun Yuan

IEEE Trans. Biomed. Circuits Syst., 2018

Resilient AES Against Side-Channel Attack Using All-Spin Logic.

Qutaiba Alasad, Jiann-Shiun Yuan, Jie Lin

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017

A 12-Bit Ultra-Low Voltage Noise Shaping Successive-Approximation Register Analogto-Digital Converter Using Emerging TFETs.

Jie Lin, Jiann-Shiun Yuan

J. Low Power Electron., 2017

Capacitor-less RRAM-based stochastic neuron for event-based unsupervised learning.

Jie Lin, Jiann-Shiun Yuan

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

2016

Ultra-Low Power Successive Approximation Analog-to-Digital Converter Using Emerging Tunnel Field Effect Transistor Technology.

Jie Lin, Jiann-Shiun Yuan

J. Low Power Electron., 2016

2011

Application of the Secure Transport SSL Protocol in Network Communication.

Feiyan Mu, Jiafen Zhang, Jing Du, Jie Lin

Proceedings of the 4th International Symposium on Computational Intelligence and Design, 2011