Jiazhi Ying

According to our database, Jiazhi Ying authored at least 2 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

32.8 A 27.8-to-38.7GHz Load-Modulated Balanced Power Amplifier with Scalable 7-to-1 Load-Modulated Power-Combine Network Achieving 27.2dBm Output Power and 28.8%/23.2%/16.3%/11.9% Peak/6/9/12dB Back-Off Efficiency.

Wei Zhu, Jiazhi Ying, Long Chen, Jian Zhang, Guanshen Lv, Xiangjie Yi, Zhiqiang Zhao, Zunxiang Wang, Yan Wang, Wenhua Chen, Houjun Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

A Hybrid Integrated W-Band 4-Element Phased-Array Transceiver Front-End Achieving 21.6% Full TX Peak PAE at 14.8dBm Output Power and <1°/dB Phase/Gain Resolution in 65-nm CMOS Technology.

Wei Zhu, Jian Zhang, Jiazhi Ying, Xiangjie Yi, Yan Wang, Houjun Sun

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023