Jiayong Le
According to our database1,
Jiayong Le
authored at least 11 papers
between 2003 and 2009.
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Bibliography
2009
Parametric analysis to determine accurate interconnect extraction corners for design performance.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 46th Design Automation Conference, 2009
2008
Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
2006
Found. Trends Electron. Des. Autom., 2006
Projection-based statistical analysis of full-chip leakage power with non-log-normal distributions.
Proceedings of the 43rd Design Automation Conference, 2006
2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
2004
Asymptotic probability extraction for non-normal distributions of circuit performance.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003