Jianxiong Xu
Orcid: 0009-0003-3419-2493
According to our database1,
Jianxiong Xu
authored at least 16 papers
between 2020 and 2024.
Collaborative distances:
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Bibliography
2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Fascicle-Selective Ultrasound-Powered Bidirectional Wireless Peripheral Nerve Interface IC.
IEEE Trans. Biomed. Circuits Syst., December, 2023
Fascicle-Selective Bidirectional Peripheral Nerve Interface IC with 173dB FOM Noise-Shaping SAR ADCs and 1.38pJ/b Frequency-Multiplying Current-Ripple Radio Transmitter.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Advanced Noise-Shaping SAR ADCs Utilizing Single-Capacitor Arbitrary-Resolution DACs for Miniaturized Neural Interfaces.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Artificially-Intelligent Fascicle-Selective Bidirectional Peripheral Nerve Interfaces.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Design Methodology for Energy-constrained AI Edge Inference in Implantable Medical Devices.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
2022
J. Signal Process. Syst., 2022
CODEX: Stochastic Encoding Method to Relax Resistive Crossbar Accelerator Design Requirements.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
2021
Safety-Optimized Inductive Powering of Implantable Medical Devices: Tutorial and Comprehensive Design Guide.
IEEE Trans. Biomed. Circuits Syst., 2021
Bidirectional Peripheral Nerve Interface With 64 Second-Order Opamp-Less ΔΣ ADCs and Fully Integrated Wireless Power/Data Transmission.
IEEE J. Solid State Circuits, 2021
28.8 Multi-Modal Peripheral Nerve Active Probe and Microstimulator with On-Chip Dual-Coil Power/Data Transmission and 64 2<sup>nd</sup>-Order Opamp-Less ΔΣ ADCs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the 15th IEEE International Conference on Big Data Science and Engineering, 2021
2020
In-Memory Vector-Matrix Multiplication in Monolithic Complementary Metal-Oxide-Semiconductor-Memristor Integrated Circuits: Design Choices, Challenges, and Perspectives.
Adv. Intell. Syst., 2020
26.2 A Neuromorphic Multiplier-Less Bit-Serial Weight-Memory-Optimized 1024-Tree Brain-State Classifier and Neuromodulation SoC with an 8-Channel Noise-Shaping SAR ADC Array.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020