Jianwen Zhu

Feng Xie

SIAM J. Control. Optim., 2024

2023

Multi-constrained intelligent gliding guidance via optimal control and DQN.

[BibT_eX]

[DOI]

Sci. China Inf. Sci., March, 2023

2020

Rotary Register File: A Micro-Architectural Primitive on FPGA.

[BibT_eX]

[DOI]

Reza Nakhjavani

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2017

A fast Bayesian algorithmic enhancement for real time bit error ratio test (BERT).

[BibT_eX]

[DOI]

Shu-Yi Jack Wong

Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017

A Case for Common-Case: On FPGA Acceleration of Erasure Coding.

[BibT_eX]

[DOI]

Reza Nakhjavani

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016

Write Skew and Zipf Distribution: Evidence and Implications.

[BibT_eX]

[DOI]

ACM Trans. Storage, 2016

Write Amplification with Write Skew.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Modeling, 2016

2015

A Sufficient Condition for Deadlock-Free Adaptive Routing in Mesh Networks.

[BibT_eX]

[DOI]

Canwen Xiao

IEEE Comput. Archit. Lett., 2015

Algebraic modeling of write amplification in hotness-aware SSD.

[BibT_eX]

[DOI]

Proceedings of the 8th ACM International Systems and Storage Conference, 2015

2014

Analytical modeling of garbage collection algorithms in hotness-aware flash-based solid state drives.

[BibT_eX]

[DOI]

Proceedings of the IEEE 30th Symposium on Mass Storage Systems and Technologies, 2014

2012

Saturating the transceiver bandwidth: switch fabric design on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011

Toward Automated ECOs in FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Timing-Driven Routing of High Fanout Nets.

[BibT_eX]

[DOI]

Xun Chen

Minxuan Zhang

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Regular fabric for regular FPGA (abstract only).

[BibT_eX]

[DOI]

Xun Chen

Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

A bursty multi-port memory controller with quality-of-service guarantees.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

On virtual prototyping of embedded system-on-chips.

[BibT_eX]

[DOI]

Yi Ni

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010

Interprocedural induction variable analysis based on interprocedural SSA form IR.

[BibT_eX]

[DOI]

Proceedings of the 9th ACM SIGPLAN-SIGSOFT Workshop on Program Analysis for Software Tools and Engineering, 2010

Using variable clocking to reduce leakage in synchronous circuits.

[BibT_eX]

[DOI]

Navid Toosizadeh

Safwat G. Zaky

Proceedings of the 28th International Conference on Computer Design, 2010

Credit Borrow and Repay: Sharing DRAM with minimum latency and bandwidth guarantees.

[BibT_eX]

[DOI]

Mark Jarvin

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Parallelizing Simulated Annealing-Based Placement Using GPGPU.

[BibT_eX]

[DOI]

Alexander Choong

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

A 1 cycle-per-byte XML parsing accelerator.

[BibT_eX]

[DOI]

Nick Ni

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Towards scalable placement for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009

Increasing the Scope and Resolution of Interprocedural Static Single Assignment.

[BibT_eX]

[DOI]

Proceedings of the Static Analysis, 16th International Symposium, 2009

VariPipe: Low-overhead variable-clock synchronous pipelines.

[BibT_eX]

[DOI]

Navid Toosizadeh

Safwat G. Zaky

Proceedings of the 27th International Conference on Computer Design, 2009

Towards automated ECOs in FPGAs.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008

Scalable Synthesis and Clustering Techniques Using Decision Diagrams.

[BibT_eX]

[DOI]

Andrew C. Ling

Stephen Dean Brown

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Delay driven AIG restructuring using slack budget management.

[BibT_eX]

[DOI]

Andrew C. Ling

Stephen Dean Brown

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2007

BddCut: Towards Scalable Symbolic Cut Enumeration.

[BibT_eX]

[DOI]

Andrew C. Ling

Stephen Dean Brown

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Dynamic-range estimation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005

Calligrapher: a new layout-migration engine for hard intellectual property libraries.

[BibT_eX]

[DOI]

Fang Fang

Qianying Tang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Context sensitive symbolic pointer analysis.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Two-Dimensional Layout Migration by Soft Constraint Satisfaction.

[BibT_eX]

[DOI]

Qianying Tang

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Towards scalable flow and context sensitive pointer analysis.

[BibT_eX]

[DOI]

Proceedings of the 42nd Design Automation Conference, 2005

A non-parametric approach for dynamic range estimation of nonlinear systems.

[BibT_eX]

[DOI]

Proceedings of the 42nd Design Automation Conference, 2005

BDD-based two variable sharing extraction.

[BibT_eX]

[DOI]

Dennis Wu

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Scalable interprocedural register allocation for high level synthesis.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Symbolic pointer analysis revisited.

[BibT_eX]

[DOI]

Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation 2004, 2004

Stacked FSMD: A Power Efficient Micro-Architecture for High Level Synthesis.

[BibT_eX]

[DOI]

Khushwinder Jasrotia

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Calligrapher: A New Layout Migration Engine Based on Geometric Closeness.

[BibT_eX]

[DOI]

Fang Fang

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Dynamic range estimation for nonlinear systems.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

DynamoSim: a trace-based dynamically compiled instruction set simulator.

[BibT_eX]

[DOI]

Massimo Poncino

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

A queuing-theoretic performance model for context-flow system-on-chip platforms.

[BibT_eX]

[DOI]

Proceedings of the 2nd Workshop on Embedded Systems for Real-Time Multimedia, 2004

An analytical approach for dynamic range estimation.

[BibT_eX]

[DOI]

Proceedings of the 41th Design Automation Conference, 2004

Piecewise quadratic waveform matching with successive chord iteration.

[BibT_eX]

[DOI]

Zhong Wang

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Automatic process migration of datapath hard IP libraries.

[BibT_eX]

[DOI]

Fang Fang

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

Performance Efficiency of Context-Flow System-on-Chip Platform.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Specification of Non-Functional Intellectual Property Components.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

Transistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching.

[BibT_eX]

[DOI]

Zhong Wang

Proceedings of the 2003 Design, 2003

A retargetable micro-architecture simulator.

[BibT_eX]

[DOI]

Proceedings of the 40th Design Automation Conference, 2003

2002

An ultra-fast instruction set simulator.

[BibT_eX]

[DOI]

Daniel D. Gajski

IEEE Trans. Very Large Scale Integr. Syst., 2002

Symbolic pointer analysis.

[BibT_eX]

[DOI]

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Hardware Implementation of a Memory Allocator.

[BibT_eX]

[DOI]

Khushwinder Jasrotia

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

Retargetable binary utilities.

[BibT_eX]

[DOI]

Maghsoud Abbaspour

Proceedings of the 39th Design Automation Conference, 2002

2001

Color Permutation: An Iterative Algorithm for Memory Packing.

[BibT_eX]

[DOI]

Edward S. Rogers Sr.

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Static memory allocation by pointer analysis and coloring.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

MetaRTL: raising the abstraction level of RTL design.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Compiling SpecC for simulation.

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2001, 2001

1999

OpenJ: An Extensible System Level Design Language.

[BibT_eX]

[DOI]

Proceedings of the 1999 Design, 1999

Soft Scheduling in High Level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 36th Conference on Design Automation, 1999

A unified formal model of ISA and FSMD.

[BibT_eX]

[DOI]

Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

1998

Specification and Design of Embedded Systems.

[BibT_eX]

[DOI]

Rainer Dömer

Daniel D. Gajski

Informationstechnik Tech. Inform., 1998

IP-Centric Methodology and Specification Language.

[BibT_eX]

Rainer Dömer