Jiansong Wan

Orcid: 0000-0002-3748-8404

According to our database1, Jiansong Wan authored at least 9 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
A novel semi-supervised model for pre-impact fall detection with limited fall data.
Eng. Appl. Artif. Intell., 2024

Traffic pattern-aware elevator dispatching via deep reinforcement learning.
Adv. Eng. Informatics, 2024

2022
Predictive vehicle dispatching method for overhead hoist transport systems in semiconductor fabs.
Int. J. Prod. Res., 2022

Hierarchical analysis of Chinese financial market based on manifold structure.
Ann. Oper. Res., 2022

2015
26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
8.5 A sub-1.75W full-duplex 10GBASE-T transceiver in 40nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Design considerations for low-power analog front ends in full-duplex 10GBASE-T transceivers.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2011
An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS.
IEEE J. Solid State Circuits, 2011

An 800MS/s dual-residue pipeline ADC in 40nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011


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