Jianhang Yang

Orcid: 0009-0007-2862-4893

According to our database1, Jianhang Yang authored at least 4 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2024
2025
0
1
2
3
4
1
3

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2025
A 0.4-V 500-kHz FLL With Reused TDA-Based Calibration and OTA-Accelerated Technique in 65-nm CMOS for Sleep Timer.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2025

2024
Hierarchical Attention Networks for Fact-based Visual Question Answering.
Multim. Tools Appl., February, 2024

A wideband low power RF Receiver Front-End for Internet-of-Things applications.
Microelectron. J., February, 2024

A 8.1-nW, 4.22-kHz, -40-85 °C relaxation oscillator with subthreshold leakage current compensation and forward body bias buffer for low power IoT applications.
Microelectron. J., February, 2024


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