Jiangli Huang

Orcid: 0000-0001-9111-8474

According to our database1, Jiangli Huang authored at least 7 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A Compact 0.1-1.95 GHz, 1.5 dB NF LNTA Based on Cascode Inverters.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Automatic Op-Amp Generation From Specification to Layout.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

2021
Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

New Linearization Implementations Improving IIP3 of Wideband LNTA by More than 14dB.
Proceedings of the 14th IEEE International Conference on ASIC, 2021


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