Jiangchao Wu
According to our database1,
Jiangchao Wu
authored at least 10 papers
between 2013 and 2024.
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Bibliography
2024
A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2024
A 93.4% Peak Efficiency C<sub>LOAD</sub>-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/ns.
IEEE J. Solid State Circuits, June, 2024
A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm<sup>2</sup>.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2021
2020
Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
2016
A 2-µW 45-nV/√Hz Readout Front End With Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013