Jianfeng An
Orcid: 0000-0001-6559-1196
According to our database1,
Jianfeng An
authored at least 22 papers
between 2004 and 2024.
Collaborative distances:
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Bibliography
2024
LCDSE: Enable Efficient Design Space Exploration for DCNN Accelerator Based on Layer Clustering.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2024
2023
ACDSE: A Design Space Exploration Method for CNN Accelerator based on Adaptive Compression Mechanism.
ACM Trans. Embed. Comput. Syst., November, 2023
Multim. Tools Appl., November, 2023
IEEE Trans. Circuits Syst. Video Technol., September, 2023
A gated multi-hierarchical feature fusion network for recognizing steel plate surface defects.
Multim. Syst., June, 2023
CSDSE: Apply Cooperative Search to Solve the Exploration-Exploitation Dilemma of Design Space Exploration.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2023
2022
An Automatic-Addressing Architecture With Fully Serialized Access in Racetrack Memory for Energy-Efficient CNNs.
IEEE Trans. Computers, 2022
2021
IEEE Netw., 2021
ERDSE: efficient reinforcement learning based design space exploration method for CNN accelerator on resource limited platform.
Graph. Vis. Comput., 2021
Proceedings of the 2021 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom), New York City, NY, USA, September 30, 2021
2020
Proceedings of the 7th International Conference on Dependable Systems and Their Applications, 2020
2019
2018
J. Circuits Syst. Comput., 2018
2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
2013
A Novel Architecture to Identify the Microprocessor Chips by Implanting Timing-Fault Execution Unit.
Proceedings of the 16th IEEE International Conference on Computational Science and Engineering, 2013
2012
Modeling and Performance Analysis of Network on Chip Based on Improved Asymmetric Multi-channel Router.
Proceedings of the 12th IEEE International Conference on Computer and Information Technology, 2012
2011
Proceedings of the Seventh International Conference on Computational Intelligence and Security, 2011
2006
VMSIM: Virtual Machine Based a Full System Simulation Platform for Microprocessors' Functional Verification.
Proceedings of the Third International Conference on Information Technology: New Generations (ITNG 2006), 2006
2005
Proceedings of the Embedded Software and Systems, Second International Conference, 2005
2004
Proceedings of the Embedded Software and Systems, First International Conference, 2004