Jianfei Wang

Orcid: 0009-0004-0132-3319

Affiliations:
  • Xi'an Jiaotong University, School of Microelectronics, China


According to our database1, Jianfei Wang authored at least 11 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Bibliography

2024
A Novel Two-Level Protection Scheme against Hardware Trojans on a Reconfigurable CNN Accelerator.
Cryptogr., September, 2024

ALSCA: A Large-Scale Sparse CNN Accelerator Using Position-First Dataflow and Input Channel Merging Approach.
IEEE Trans. Circuits Syst. II Express Briefs, July, 2024

A High-Throughput and Scalable Schoolbook Polynomial Multiplier for Accelerating Saber on FPGA Using a Novel Winograd-Based Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

Flexible and Efficient Convolutional Acceleration on Unified Hardware Using the Two-Stage Splitting Method and Layer-Adaptive Allocation of 1-D/2-D Winograd Units.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

WRA-SS: A High-Performance Accelerator Integrating Winograd With Structured Sparsity for Convolutional Neural Networks.
IEEE Trans. Very Large Scale Integr. Syst., January, 2024

A High-Throughput Toom-Cook-4 Polynomial Multiplier for Lattice-Based Cryptography Using a Novel Winograd-Schoolbook Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

An Efficient and Scalable FHE-Based PDQ Scheme: Utilizing FFT to Design a Low Multiplication Depth Large-Integer Comparison Algorithm.
IEEE Trans. Inf. Forensics Secur., 2024

2023
An Efficient CNN Accelerator Achieving High PE Utilization Using a Dense-/Sparse-Aware Redundancy Reduction Method and Data-Index Decoupling Workflow.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023

TCPM: A Reconfigurable and Efficient Toom-Cook-Based Polynomial Multiplier Over Rings Using a Novel Compressed Postprocessing Algorithm.
IEEE Trans. Very Large Scale Integr. Syst., August, 2023

POSS-CNN: An Automatically Generated Convolutional Neural Network with Precision and Operation Separable Structure Aiming at Target Recognition and Detection.
Inf., 2023

An Efficient Hardware Implementation of Dilated Convolution Using a Novel Channel-Equivalent Decomposition Method.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023


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