Jian-Hao Huang
According to our database1,
Jian-Hao Huang
authored at least 6 papers
between 2012 and 2019.
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Bibliography
2019
Physically Tightly Coupled, Logically Loosely Coupled, Near-Memory BNN Accelerator (PTLL-BNN).
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
A Neuromorphic Computing System for Bitwise Neural Networks Based on ReRAM Synaptic Array.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
DI-SSD: Desymmetrized interconnection architecture and dynamic timing calibration for solid-state drives.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
DVFS-aware motion estimation design scheme based on bandwidth-rate-distortion optimization in application processor systems.
Integr., 2017
2012
J. Circuits Syst. Comput., 2012
Multifunction RNS modulo (2<sup>n</sup>±1) multipliers based on modified booth encoding.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012