Jiajin Tu

According to our database, Jiajin Tu authored at least 5 papers between 2006 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Ascend: a Scalable and Unified Architecture for Ubiquitous Deep Neural Network Computing : Industry Track Paper.

Heng Liao, Jiajin Tu, Jing Xia, Hu Liu, Xiping Zhou, Honghui Yuan, Yuxing Hu

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2019

DaVinci: A Scalable Architecture for Neural Network Computing.

Heng Liao, Jiajin Tu, Jing Xia, Xiping Zhou

Proceedings of the 2019 IEEE Hot Chips 31 Symposium (HCS), 2019

2008

Sequential equivalence checking between system level and RTL descriptions.

Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham, Jiajin Tu

Des. Autom. Embed. Syst., 2008

2007

Hardware Efficient Piecewise Linear Branch Predictor.

Jiajin Tu, Jian Chen, Lizy K. John

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

2006

Automatic decomposition for sequential equivalence checking of system level and RTL descriptions.

Shobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu

Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006